ICS

IC Substrate Facility Profile

  • Established FastPrint IC Substrate facility (GuangZhou) in 2012
  • Investment: $90M USD
  • IC Substrate facility area 130,000 sq ft
  • Target products: All type PKG substrate; CSP, fcCSP, SiP, MCP, PBGA, Ultra Thin core substrate

Key Statistics:

  • 130,000 sq ft facility/mm
  • 12,500 panels/wk
  • 12,500 cores/wk
  • 50 jobs/wk
  • 30 new tools/wk
  • 4L layer avg.
  • 100 sq ft avg size
  • 300 team members

Major Market Segments:

  • AP for Smartphone & Tablet
  • BB, BT, WiFi  for Smart Phone & IoT
  • PA, PMIC
  • Wireless RF
  • eMMC, eMCP for Memory
  • FMC
  • MCU for Automotive (PBGA)

Engineering Services:

  • CAM350, PROTEL, PADS, POWERPCB, AUTOCAD, GENESIS, ORCAD

Surface Finishes:

  • E’tro-Ni/Au
  • ENIG(+OSP)
  • ENEPIG
  • OSP(AFOP/OFAP)
  • Hard Au
  • SOP

Key Technical Capabilities:

  • Fine pattern L/S 1/1mil
  • Zero-dimple SR Flatness
  • Full stack Build up w/ Cu via Fill
  • Fine Pitch SOP Bump 130umP
  • Tailless/Etch back process
  • Thin Core Technology
  • Coreless/ETS Odd Layer

Materials:

  • Core Material:
    • MGC, Doosan, Hitachi,  AMC
  • SR Ink Material:
    • Taiyo AUS308, 320, 410, SR-1,SR-2
    • EG-23/23A(Black)
  • Plug Material:
    • San-Ei  IR-6P, IR-6PH, IR-10FE

IC Substrate Product & Application

Road Map

IC Substrate Roadmap

– Design Roadmap for W/B CSP

Item 201620172018
ThicknessCore403530
2L958580
4L165140130
Drill (Φ/Pad)Mech.75/17575/16075/155
Laser60/13060/10950/89
PatternTenting35/3530/3030/30
MSAP25/2520/2020/20
PSAP & SAP20/2018/1815/15
SAP-15/1510/10
Bond Finger Pitch807060
Surface FinishElectro-Ni/Au
ENIG,ENEPIG
OSP (AFOP)
Hard Au
EPIG (Thin Ni)Electrolytic Tin
Panel Size415mm x 510mm415mm x 510mm510mm x 610mm

IC Substrate Roadmap

– Design Roadmap for FC-CSP / PoP

Item 201620172018
Fab. Node28nm HKMG16/14nm FinFET14nm FinFET
Min. Bump
Pitch (mil)
Area140130130
Peripheral504540/80
Bumping methodScreen
Bump SRO/Pad70/10060/9050/80
Patterning ProcessMSAPETS+CorelessPSAP
Min. Line Pitch605030
Surface TreatmentCZCZNonEtching
SRR (μm)+/-15+/-10+/-10
Bump materialSn/Pb,SACSn/Pb,SACSn/Pb,SAC
Via(μm)BVH60/13060/10950/80
IVH60/14060/13050/89
Core thickness403530
Surface FinishFC (C4)OSP+SOPENEPIG+SOPENEPIG+SOP
HybridNi/Au+SOP, AFOP+SOPENEPIG+SOPENEPIG+SOP
TC-NCP-EPIG (Thin Ni)Electrolytic Tin

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